The present invention relates to a semiconductor package through-electrode and a semiconductor package having the same.
A semiconductor package is generally manufactured in a three-step process including a semiconductor chip making process, an electric test process, and a packaging process. The semiconductor chip making process generates wafers consisting of devices such as transistors, registers, and capacitors. The electric test process electrically tests the semiconductor chip and classifies each chip as a good or bad semiconductor chip. The packaging process protects the fragile semiconductor chip from external attacks and/or vibrations.
The semiconductor package, including the semiconductor device, has been applied to such devices as personal computers, television receivers, consumer electronics, and information communication machines.
Advancements in semiconductor package technology have yielded a “chip scale package” that is 100% to 105% of the size of existing semiconductor chips. Advancements have also yielded a “stacked semiconductor package” improving data storage capacity and data process velocity by stacking multiple semiconductor chips and/or semiconductor packages.
The recently developed stacked semiconductor package is manufactured by forming a through-electrode on the semiconductor chip and stacking a plurality of semiconductor chips having a through-electrode.
A high melting point metal, such as copper, is generally used in forming the through-electrode formed on the semiconductor chip.
Therefore, the through-electrodes formed on adjacent semiconductor chips can be connected with each other via a low melting 15 point metal such as a solder. The high melting point through-electrodes of the semiconductor chips are unaffected by the low melting point solder and are electrically connected to one another.
However, a gap may be generated between the stacked semiconductor chips due to the solder used to electrically connect the through-electrodes. The gap formed by the solder greatly reduces the reliability of the stacked semiconductor package.
An under-fill material may be injected between the soldered semiconductor chips in order to eliminate the reduction in reliability due to the gap formed during soldering. However, the narrow gaps of earlier stacked semiconductor packages cannot be injected with the under-fill materials.
It is possible to overcome such a problem and electrically connect the through-electrodes of the adjacent semiconductor chips directly to one another. To do so causes another problem because the through-electrodes must then be bonded at a high temperature and high pressure to directly and electrically connect the through-electrodes with each other.